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uart-receiver

Here are 24 public repositories matching this topic...

pConst / basic_verilog

Must-have verilog systemverilog modules

Updated Mar 12, 2026
Verilog

dipakgmx / ATMega_Serial

Serial communication (USART) on the ATMega 2560 using C++ classes

avr cmake serial uart usart uart-protocol serial-communication flashes atmega2560 atmel-avr-microcontroller uart-tx uart-receiver

Updated Oct 1, 2019
C++

Shamanthpoojary / UartX

Cross-platform UART debugging and log analysis for embedded and firmware developers.

Updated Sep 28, 2026
C++

manish5897 / esp32_uart

UART receive task

esp32 freertos uart uart-receiver

Updated Oct 7, 2018
C++

kishanpatelec / UART-for-bluetooth-module

bluetooth uart uart-verilog uart-protocol hc-05 uart-controller uart-tx uart-com uart-receiver

Updated Mar 16, 2019
Verilog

MiguelNarv / UART-Receiver-VHDL

Low resource UART receiver for FPGA.

fpga vhdl low-resource uart-receiver

Updated Jan 12, 2022
VHDL

onegen-dev / VUT-FIT-INC2022-projekt

Projekt (UART přijímací část) z předmětu Návrh číslicových systémů (INC), druhý semestr bakalářského studia BIT na FIT VUT/BUT, ak.rok 2021/2022

fsm fpga vhdl university-project xilinx uart xilinx-fpga vutbr vut vhdl-code vut-fit vhdl-coursework uart-receiver brno-university-of-technology

Updated Jan 12, 2024
VHDL

Sarst04 / UART

A parametrizable, modular UART with FIFO buffers, even parity, and interrupt support.

uart uart-verilog uart-protocol uart-transmitter uart-receiver

Updated Sep 7, 2026
SystemVerilog

TheLeopardsH / UART

Universal Asynchronous Receiver Transmitter

fpga verilog uart uart-verilog uart-receiver receiver-transmitter

Updated Aug 11, 2020
Verilog

theMHD-120 / MicroLab-Spring2025

Contents presented in the Microcontrollers Laboratory Course; Microcontrollers used: Arduino UNO R3 & DOIT ESP32 DEVKIT V1 - CSE Department, Shiraz University, Spring 2025

arduino microcontroller esp32 arduino-uno rgb-led uart-protocol microlab push-button softwareserial-library arduino-uno-r3 esp32-arduino uart-transmitter uart-receiver analog-to-digital-converter serial-communications esp32-webserver doit-esp32-devkit-v1 post-get-method

Updated May 11, 2026
C++

windfallw / ESP32-Air-Monitor

This is an ESP32 project for receiving json from another device by uart and send it to the server. Also provide web service for management.

web-server micropython chartjs bootstrap4 web-client sb-admin-2 uart-receiver micropython-esp32

Updated Feb 16, 2022
Python

oskarwires / uart2

SystemVerilog UART transciever

fpga systemverilog uart-transmitter uart-receiver

Updated Feb 5, 2024
SystemVerilog

Mahesh-613 / UART-Design-UVM-Verification

UART (Universal Asynchronous Receiver-Transmitter) is a widely used,, cost-effective serial communication protocol that facilitates data exchange between microcontrollers and peripheral devices using only two wires—Transmit (TX) and Receive (RX). It operates asynchronously, meaning it relies on matched baud rates rather than a shared clock signal

rtl synthesis uart transmitter uart-verilog synopsys uvm system-verilog uart-protocol uart-receiver verilog-code rtl-code uart-uvm

Updated Aug 17, 2026
Verilog

Angelo-EEE / FPGA-UART-Loopback--VHDL

A complete VHDL UART transceiver and loopback interface featuring 2-stage input synchronization, mid-bit oversampling, framing error detection, and an integrated FIFO buffer.

fpga vhdl uart testbenches fpga-soc testbench uart-protocol fpgas uart-interface fpga-board vhdl-code fpga-development uart-tx vhdl-examples uart-transmitter uart-receiver fpga-programming uart-communication testbench-verification

Updated Sep 17, 2026
VHDL

bangre-16 / UART-Transmitter-and-Receiver-Design-and-Verification

Verilog HDL implementation, simulation, and functional verification of a UART Transmitter and Receiver using Intel Quartus Prime and ModelSim.

asic fpga electronics rtl verilog uart vlsi modelsim verilog-hdl digital-design serial-communication quartus uart-transmitter uart-receiver hardware-design

Updated Jul 1, 2026
Verilog

Suhas-48 / Baud-Showcase

Serial dashboards and control-loop sandboxes, no GUI code. Showcase repo — source available on request.

embedded dashboard serial simulation sandbox data-visualization embedded-systems uart control-systems no-code foc dashboard-application gui-builder uart-receiver motor-control no-code-platform uart-communication dashboard-design

Updated Aug 20, 2026

Jain496 / uart-verilog

UART transmitter and receiver in Verilog with a self-checking testbench

hardware rtl verilog testbench uart-tx uart-receiver

Updated Sep 10, 2026
Verilog

markjustinimmanuel2018-svg / RTL-Protocol-Foundations

Phase-2 Cycle-1: RTL Protocol Foundations

uart-protocol spi-master spi-protocol spi-slave uart-transmitter uart-receiver

Updated Jul 31, 2026
Verilog

X8OCT / SERIALFORGE-PRO

EngineerMazeed / Uart_Terminal

An Android app built with Kotlin and Jetpack Compose to talk to microcontrollers and serial hardware over a standard USB OTG cable.

android kotlin linux microcontroller terminal embedded-systems otg uart serial-communication uart-bridge uart-controller usb-serial uart-receiver jetpack-compose

Updated Jun 8, 2026

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